Special Session 11:
Low-cost/Low-power Integrated Circuits Design for
High Performance Communication Systems
ORGANIZERS
Zhenghao Lu, Soochow University, China and Xiaopeng Yu, Zhejiang University, China
SYNOPSIS
Recent developments in multi-standard wireless and high-speed optical communication applications are accompanied by the dramatic growth of mobile devices and wide deployment of communication components. Such trend entails the development of integrated circuits with ever-decreasing chip-size, cost, power consumption and transistor scale. This special session deals with some low-power/low-cost circuit design problems for applications such as high-speed optical communication, frequency synthesizing, power management and analog-to-digital converters. These circuit blocks can be found widely used in high performance communications systems.
This special session consists of seven contributing papers. Paper [1] presents a novel inductor-less broadband design technique that can significantly enhance bandwidth of broadband amplifiers. Paper [2] presents a high performance baseband chip design for high speed optical communications. Paper [3] describes an optimized system design of Fractional-N PLL in sub-100nm CMOS technology. Papers [4] and [5] talk about low-power high-efficiency circuits for power management systems. Papers [6] and [7] introduce some circuit optimization and modeling techniques for high performance ADCs.
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